o.pos = (4,4) o.data = [ (0,0,7),(1,3,3) ] o.data += [ (0,0,0),(1,2,0),(0,0,2),(1,2,1),(0,2,1),(1,1,0),(0,2,0),(1,2,0) ] # rom0 -> add0, rom2 -> add1, add1 -> ram0, add0 -> add0 o.data += [ (0,0,4),(1,2,1),(0,2,1),(1,1,1),(0,2,0),(1,3,0) ] # rom4 -> add1, add1 -> ram1, add0 -> lamp0 o.data += [ (0,1,0),(1,2,0),(0,1,1),(1,2,1),(0,2,0),(1,2,0) ] # ram0 -> add0, ram1 -> add1, add0 -> add0 o.data += [ (0,0,1),(1,2,1),(0,2,1),(1,1,2),(0,2,0),(1,2,0) ] # rom1 -> add1, add1 -> ram2, add0 -> add0 o.data += [ (0,0,3),(1,2,1),(0,2,1),(1,1,3),(0,2,0),(1,2,0) ] # rom3 -> add1, add1 -> ram3, add0 -> add0 o.data += [ (0,0,5),(1,2,1),(0,2,1),(1,1,4),(0,2,0),(1,3,1) ] # rom5 -> add1, add1 -> ram4, add0 -> lamp1 o.data += [ (0,1,2),(1,2,0),(0,1,3),(1,2,1),(0,2,0),(1,2,0) ] # ram2 -> add0, ram3 -> add1, add0 --> add0 o.data += [ (0,1,4),(1,2,1),(0,2,0),(1,3,2) ] # ram4 -> add1, add0 -> lamp2 o.data += [ (0,0,0) ] * 14 # none sense o.dlst = [ (to_dev<<7)|(dev_addr<<4)|a for (to_dev, dev_addr, a) in o.data ] ROM_SEQ( o, 8, 6, o.dlst, 'rom_seq' ) BUS( o, 4, 3, 2, 'bus' ) conn2_n( 4, (o.rom_seq, 'out', 0), (o.bus, 'AI', 0) ) conn2_n( 3, (o.rom_seq, 'out', 4), (o.bus, 'DEV_A', 0) ) o.rom_seq.out_7.conn = o.bus.TO_DEV o.rom_seq.nQ.conn = o.bus.CLK o.rom_dlst = [ 7,8, 8,9, 9,1 , 3,7 ] ROM( o, 4, 3, o.rom_dlst, 'rom' ) o.bus.conn( 0, o.rom, 'D', None ) RAM( o, 4, 3, 'ram' ) o.bus.conn( 1, o.ram ) ADD_DEV( o, 4, 'add_dev' ) o.bus.conn( 2, o.add_dev ) LAMP_7_DEV_3( o, 'lamp_dev' ) o.bus.conn( 3, o.lamp_dev ) Pin( o, 'en' ).conn = Joint( o, 'jt_en' ).new_pin() o.jt_en.new_pin().conn = o.rom_seq.en o.jt_en.new_pin().conn = o.bus.en sched.enque( (1,0), sched.enque_just, o.en.set, 'H' ) sched.enque( (480,0), sched.quit ) # EOF